Please list your new proposal(s) under “uncategorized”. It will be categorized soon.

• License
• Proposal Flow
• Git Flow
• Project Goals

• Vendor/Device Configuration (abstract code from vendors, tool or devices)

• Utility functions (e.g. log2, gray2bin, bin2onehot)
• String manipulations
• Physical Types (e.g. Time, Frequency, Memory, Baudrate)
• std_logic_matrix (2-dim. std_logic vectors)
• mathematical function (e.g. triangular number, binomial coefficient)

• Synthesizable functions

• Sorting

• Generic List
• Generic Queue
• Generic Stack
• Memory / Sparse Memory
• Generic Associative Array / Dictionary

• VCD Parser
• JSON Parser
• Log Files
• PCAPNG Files

• Functional Coverage (OSVVM)

• Random Stimulus Generation (OSVVM)

• Table Driven Modelling

• TOPIC NAME please copy that line and replace TOPIC and TOPIC NAME

See the Testbench and Verification related enhancements to VHDL document.

• TBV2 - Associative Arrays
• TBV4 - Queues / FIFO
• TBV7 - Sync and Handshaking
• TBV12 - Memory / Sparse array
• TBV18 - Loading and Dumping Memories
• TBV19 - Lists